High and Low Speed Output Buffer Design with Reduced Switching Noise for USB Applications

-A novel high and low speed output buffer circuit is proposed for Universal Serial Bus (USB) interface applications. Operation principles of this novel buffer are developed based on slew rate control and delayed turn-on technique. The mechanism for slew rate control is process variation self compensating. So, both precise rise and fall times of the output signal have been obtained for low speed operation. Moreover, the pull-up and pulldown output drivers are divided into several sub-drivers in parallel with the delayed turn-on characteristics. Therefore, the change of rate of di/dt decreases. And the simultaneous switching noise, based on simulations, are reduced from maximum overshoot 3.47V to 3.36V and maximum undershoot from -0.427V to -0.068V, respectively. This proposed output buffer design is low cost due to its easy realization in a digital CMOS process. The disclosed output buffer has been integrated in a complete USB transceiver circuit. Based on measured silicon data, satisfactory functions of the whole USB application IC have been obtained. Key-Words: USB, Slew rate, High and low speed, Delayed turn-on, Switching noise